1. Field of the Invention
The present invention relates to a device capable of QPSK(Quadrature Phase Shift Keying) modulation which up-converts a baseband signal to an IF(Intermediate frequency) signal in a communication field such as a CDMA(Code Division Multiple Access) communication field, and more particularly, to a phase compensator capable of compensating a phase error between an in-phase signal (I-signal) and a quadrature-phase signal (Q-signal).
2. Background of the Invention
A related art device and method of QPSK modulation will be explained with reference to the attached drawings. FIG. 1 illustrates a related art device capable of QPSK modulation.
Referring to FIG. 1, a related art device capable of QPSK modulation is provided with a first 8-bit digital-to-analog converter (DAC) 1 for receiving an 8-bit digital signal TXD7-0 synchronous to a rising edge of a clock signal TXCLK and converting that received digital signal into an analog signal, a second 8-bit digital-to-analog converter (DAC) 2 for receiving an 8-bit digital signal TXD7-0 synchronous to a falling edge of the clock signal TXCLK and converting that received digital signal into an analog signal, a first low-pass filter 3 for filtering the analog signal from the first 8-bit digital-to-analog converter 1 to provide only a baseband signal, a second low-pass filter 4 for filtering the analog signal from the second 8-bit digital-to-analog converter 2 to provide only a baseband signal, an I/Q local signal forwarder for forwarding a digital I-signal (In-Phase signal) and a digital Q-signal (Quadrature-Phase signal), respectively, a first mixer 6 for receiving and mixing the I-signal from the I/Q local signal forwarder 5 and the signal from the first low-pass filter 3 and for generating an IF band signal therefrom, a second mixer 7 for receiving and mixing the Q-signal from the I/Q local signal forwarder 5 and the signal from the second low-pass filter 4 and for generating an IF band signal therefrom, and a summer 8 for summing the signals from the first and second mixers 6 and 7, respectively, and for generating 2-bit TXIF and TXIF/signals therefrom. The I-signal and the Q-signal have a 90xc2x0 phase difference. The related art device of FIG. 1 can be configured for wireless communications, or the like, where items 1-8 are configured for signals in a communication field such as CDMA.
A related art method capable of QPSK modulation via the aforementioned related art device will be explained. In the QPSK modulation having an I-channel and Q-channel, four states of phases (for example, 0, xcfx80/2, xcfx80, 3xcfx80/2) are used for transmission of information.
An 8-bit digital data is provided to the first digital-to-analog converter 1 at a rising edge of a transmission clock signal TXCLK, and an 8-bit digital data is provided to the second digital-to-analog converter 2 at a falling edge of a transmission clock signal TXCLK. The first and second digital-to-analog converters 1 and 2 convert the received 8-bit digital data into analog signals, respectively. The first and second low-pass filters 3 and 4 respectively filter the analog signals received from the first and second digital-to-analog converters 1 and 2, and each provides a baseband signal. The first mixer 6 mixes an I-signal received from the I/Q local signal forwarder 5 and the baseband signal received from the first low-pass filter 3, and generates an IF band signal therefrom. The second mixer 7 mixes the Q-signal received from the I/Q local signal forwarder 5 and the baseband signal received from the second low-pass filter 4, and generates an IF band signal therefrom. The summer 8 then sums the I-channel IF signal and the Q-channel IF signal received from the first and second mixers 6 and 7, respectively, and generates 2-bit TXIF and TXIF/signals therefrom.
As described, the related art device has at least the following problems.
In the QPSK modulation, the I-signal and the Q-signal should have a phase difference of exactly 90xc2x0. However, because of differences in delays of the I-signal and the Q-signal in the I-signal and Q-signal paths through the DACs 1-2, filters 3-4 and mixers 6-7, and because of timing differences of the rising edges and the falling edges caused by TXCLK duty cycle errors, despite a required TXCLK duty of exactly 50, the I-signal and the Q-signal mixed at mixers 6 and 7 do not generally have a phase difference of exactly 90xc2x0, but instead have a phase difference that differs from 90xc2x0 by some error. If this error is experienced at the transmission side, the I-signal and the Q-signal become difficult to restore at a reception side.
Accordingly, the present invention is directed to a phase compensator that substantially obviates one or more of the problems due to limitations and disadvantages of the related art.
An object of the present invention is to provide a phase compensator for compensating a phase error occurring between an in-phase signal and a quadrature-phase signal.
Additional features and advantages of the invention will be set forth in the description which follows, and in part will be apparent from the description, or may be learned by practice of the invention. The objectives and other advantages of the invention will be realized and attained by the structure particularly pointed out in the written description and claims hereof as well as the appended drawings.
To achieve these and other advantages and in accordance with the purpose of the present invention, as embodied and broadly described, the present invention provides a phase compensator to ensure a phase difference of 90xc2x0 required for QPSK. The phase compensator receives a digital I-signal (In-Phase signal) and a digital Q-signal (Quadrature-Phase signal) from a I/Q local signal forwarder. The phase compensator delays at least one of the received signals an amount necessary to realize a 90xc2x0 phase difference between two baseband signals used to form a Quadrature Phase Shift Key output, effectively compensating for relative delays in the two baseband signals that would otherwise result in a phase difference that differs from the requisite 90xc2x0 phase difference.
The device of QPSK modulation includes a first digital-to-analog converter for converting an 8-bit digital signal into an analog signal synchronous to a rising edge of a clock signal, a second digital-to-analog converter for converting an 8-bit digital signal into an analog signal synchronous to a falling edge of a clock signal, a first low-pass filter for filtering the analog signal from the first digital-to-analog converter to provide only abaseband signal, a second low-pass filter for filtering the analog signal from the second digital-to-analog converter to provide only a baseband signal, an I/Q local signal forwarder for forwarding a digital I-signal and a digital Q-signal respectively, an I/Q phase compensator for compensating the I-signal and the Q-signal from the I/Q local signal forwarder for a phase error, a first mixer for mixing the I-signal from the I/Q phase compensator and the signal from the first low-pass filter to make an up conversion to an IF band, a second mixer for mixing the Q-signal from the I/Q phase compensator and the signal from the second low-pass filter to make an up conversion to an IF band, and a summer for summing signals from the first and second mixers to provide 2-bits of TXIF and TXIF/signals.
Another aspect of the present invention includes a phase compensator with a selector for subjecting external selection code signals to a logical operation resulting in the generation of a first selection signal and a second selection signal, and a delay for delaying a positive I-signal, a negative I-signal, a positive Q-signal and a negative Q-signal for time periods different from one another in response to the first and second selection signals generated by the selector.
It is to be understood that both the foregoing general description and the following detailed description are exemplary and explanatory and are intended to provide further explanation of the invention as claimed.